Downscating of integrated circuits (ICs) and miniaturization of mobile systems are hindered by the saturation in the reduction of the supply voltage VDD and signal voltage around 1 Volt (V). This is due to the requirement that on-current (Ion) to off-current (Ioff) ratio usually needs to exceed a ratio of about 107 to guarantee low current and power consumption providing long stand-by times and low heating of the ICs. The sub-threshold swing governing the transition from the off-state to the on-state should be in the range of about 63 mV/decade. This is a physical limitation for the conventional semiconductor devices in use for current ICs. At the same time, it is desired that the on-state is delivering several 100 μA/μm, ideally more than 500 μA/μm for NFET (N-channel field effect transistor) devices to be compliant with performance requirements of various electronic systems. Thus, for these applications, it is no solution to operate in the close to or even below threshold regime. It is desired to provide semiconductor devices which exhibit significantly lower sub-threshold swings (e.g. in the range from about 10 mV/decade to about 15 mV/decade) and provide a high on-current. It is desired to scale the supply voltage to values as low as about 0.3 V to about 0.4 V without loss of performance. This would lower the active power consumption (which is proportional to the product of the capacity and the square of the operating voltage) compared to an integrated circuit operating at a voltage of 1 V by almost an order of magnitude.
One conventional type of transistor for this purpose is the so-called Tunnel Field Effect Transistor (TFET). The concept of a TFET is usually based on a pin diode in reverse polarity, wherein the i-region is controlled by a gate. If the inversion channel is formed at the surface of the i-region, the energy band edges are bent in such a way that rather strong band-to-band tunneling occurs. The tunneling mechanism is usually not governed by
      eV    kT    .Thus, sub-threshold swings much below the 63 mV/decade may be achieved. In one conventional TFET, a sub-threshold swing as low as 10 mV/decade has been achieved. However, this conventional TFET is usually not used in standard CMOS (Complementary Metal Oxide Semiconductor) circuits due to its very low on-current at the desired voltage. This holds true for all conventional TFETs which may have different structures such as a lateral TFET, a vertical TFET, or a FIN-TFET. Typical values of a silicon based TFET is in the range from several 10 nA/μm to about 100 nA/μm.
An improvement of two to three orders of magnitude was achieved by the use of silicon germanium (SiGe) in the source region of a TFET. This conventional so-called HT-FET can achieve several 1 μA/μm to 10 μA/μm at an operating voltage VDD of about 0.4 V. The HT-FET has also proven good gate length scaling behavior. However, even for the HT-FET, the on-current is still too low for the ultra low voltage operation systems working at several 10 MHz to 100 MHz of operational frequency which requires an on-current of about several 100 μA/μm at an operating voltage VDD of about 0.4 V.
Another conventional device showing a low sub-threshold swing is the so-called IMOS (Impact Ionization Metal Oxide Semiconductor) device, which is based on driving the device into the avalanche multiplication regime. However, this typically requires a high source-to-drain-voltage beyond 1 V, even if the gate voltage (VG) can be low. This does not comply to the request of a maximum VG=VD (drain voltage)=VDD of being in the range from 0.3 V to 0.4 V.